1. Field of the Invention
The present application relates to a semiconductor memory including a redundant cell array that relieves a defective cell array.
2. Description of Related Art
Generally, a semiconductor memory such as an SRAM includes memory cells and redundant memory cells. When the memory cells are defective, the defective memory cells are not used, and, instead, the redundant memory cells are used. Replacing the memory cells allows the defective memory cells to be relieved and improves the yield of the semiconductor memories. In other words, the rate of non-defective products is increased. However, the defective memory cells still physically remain after the defective memory cells are relieved. The defective memory cells cause an increase in the leakage current. When a standby current of the semiconductor memory exceeds a certain standard value due to an increase in the leakage current, the semiconductor memory is determined to be a defective product. One method is proposed in order to prevent the leakage current from flowing through the defective memory cell. In the method, a power supply line coupled to a memory cell column including a defective memory cell is set to a floating state. Japanese Laid-open Patent Publication No. 2001-195893 discloses another method. In this method, a ground voltage is supplied to a power supply line coupled to a memory cell column including a defective memory cell.